View HCTS299MS02_4138949.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

TM
HCTS299MS
Radiation Hardened 8-Bit Universal Shift Register; Three-State
Pinouts
20 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE (SBDIP) MIL-STD-1835 CDIP2-T20 TOP VIEW
S0 OE1 OE2 I/O6 I/O4 I/O2 I/O0 Q0 MR 1 2 3 4 5 6 7 8 9 20 VCC 19 S1 18 DS7 17 Q7 16 I/O7 15 I/O5 14 I/O3 13 I/O1 12 CP 11 DS0
August 1995
Features
* * * * * * * * * * * * 3 Micron Radiation Hardened CMOS SOS Total Dose 200K RAD (Si) SEP Effective LET No Upsets: >100 MEV-cm2/mg Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/ Bit-Day (Typ) Dose Rate Survivability: >1 x 1012 RAD (Si)/s Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse Latch-Up Free Under Any Conditions Fanout (Over Temperature Range) -Bus Driver Outputs: 15 LSTTL Loads Military Temperature Range: -55oC to +125 oC Significant Power Reduction Compared to LSTTL ICs DC Operating Voltage Range: 4.5V to 5.5V LSTTL Input Compatibility -VIL = 0.8V Max -VIH = VCC/2 Min Input Current Levels Ii 5A at VOL, VOH
GND 10
*
Description
The Intersil HCTS299MS is a Radiation Hardened 8-bit shift/ storage register with three-state bus interface capability. The register has four synchronous operating modes controlled by the two select inputs (S0, S1). The mode select, the serial data (DS0, DS7) and the parallel data (IO0 - IO7) respond only to the low to high transition of the clock (CP) pulse. S0, S1 and the data inputs must be one set up time period prior to the clocks positive transition. The master reset (MR) is an asynchronous active low input. The HCTS299MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family with TTL input compatibility.
S0 OE1 OE2 I/O6 I/O4 I/O2 I/O0 Q0 MR GND
20 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE (FLATPACK) MIL-STD-1835 CDFP4-F20 TOP VIEW
1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VCC S1 DS7 Q7 I/O7 I/O5 I/O3 I/O1 CP DS0
Ordering Information
PART NUMBER HCTS299DMSR HCTS299KMSR HCTS299D/Sample HCTS299K/Sample HCTS299HMSR TEMPERATURE RANGE -55oC to +125oC -55oC to +125oC +25oC +25oC +25oC SCREENING LEVEL Intersil Class S Equivalent Intersil Class S Equivalent Sample Sample Die PACKAGE 20 Lead SBDIP 20 Lead Ceramic Flatpack 20 Lead SBDIP 20 Lead Ceramic Flatpack Die DB NA
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2002. All Rights Reserved 624
Spec Number
518640 FN3069.1
HCTS299MS Functional Block Diagram
S1 20 19
DS7 18
STANDARD OUTPUT Q7 17
BUS LINE OUTPUTS I/O7 16 I/O5 15 I/O3 14 I/O1 13 CP 12 DS0 11
VCC OE OE OE OE OE OE OE OE
D7 CL CL Q D R Q7 S1 S1 S0 Q D
D5 CL R Q5 CL Q D
D3 CL R Q3 CL Q D
D1 CL R Q1 MODE SELECT LOGIC CL CL CL
S0
OE Q6 Q4 Q2 Q0
OE CL CL
D6 R D Q CL CL
D4 R D Q CL CL
D2 R D Q CL CL
D0 R D Q
OE OE
OE OE
OE OE
OE OE
GND
1 S0
2 OE1
3 OE2
4 I/O6
5 I/O4
6 I/O2
7 I/O0
8
9
10
BUS LINE OUTPUTS
Q0 MR STANDARD OUTPUT
Spec Number 625
518640
HCTS299MS
TRUTH TABLE Register Operating Modes INPUTS FUNCTION Reset (Clear) Shift Right MR L H H Shift Left H H Hold (Do Nothing) Parallel Load H H H CP X S0 X h h l l l h h S1 X l l h h l h h DS0 X l h X X X X X DS7 X X X l h X X X I/On X X X X X X l h Q0 L L H q1 q1 q0 L H REGISTER OUTPUTS Q1 L q0 q0 q2 q2 q1 L H ... ... ... ... ... ... ... ... ... Q6 L q5 q5 q7 q7 q6 L H Q7 L q6 Q6 L H q7 L H
TRUTH TABLE Three-State I/O Port Operating Mode INPUTS FUNCTION Read Register OE1 L L L L Load Register Disable I/O X H X OE2 L L L L X X H S0 L L X X H X X S1 X X L L H X X Qn (REGISTER) L H L H Qn = I/On X X INPUTS/OUTPUTS I/O0 . . . I/O7 L H L H I/On = Inputs Z Z
H = HighVoltage Level L = Low Voltage Level X = Immaterial Z = Output in High Impedance State h = Input Voltage High One Setup Time Prior Clock Transition l = Input voltage Low One Setup Time Prior Clock Transition = Low-to-High Clock Transition qn = Lower Case Letter Indicates the State of the Referenced Output One Setup Time Prior Clock Transition
Spec Number 626
518640
Specifications HCTS299MS
Absolute Maximum Ratings
Supply Voltage (VCC) . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 to +7.0V Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VCC +0.5V DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . . 10mA DC Drain Current, Any One Output. . . . . . . . . . . . . . . . . . . . . . . 25mA (All Voltage Reference to the VSS Terminal) Storage Temperature Range (TSTG). . . . . . . . . . . -65oC to +150oC Lead Temperature (Soldering 10sec). . . . . . . . . . . . . . . . . . +265oC Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Reliability Information
Thermal Resistance JA JC SBDIP Package. . . . . . . . . . . . . . . . . . . . 72oC/W 24oC/W Ceramic Flatpack Package . . . . . . . . . . . 107oC/W 28oC/W o Maximum Package Power Dissipation at +125 C Ambient SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.69W Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.47W If device power exceeds package dissipation capability, provide heat sinking or derate linearly at the following rate: SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.9mW/oC Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . 9.3mW/oC
CAUTION: As with all semiconductors, stress listed under "Absolute Maximum Ratings" may be applied to devices (one at a time) without resulting in permanent damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The conditions listed under "Electrical Performance Characteristics" are the only conditions recommended for satisfactory device operation.
Operating Conditions
Supply Voltage (VCC) . . . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V Operating Temperature Range (TA) . . . . . . . . . . . . -55oC to +125oC Input Rise and Fall Times at 4.5V VCC (TR, TF) . . . . . . . 500ns Max Input Low Voltage (VIL). . . . . . . . . . . . . . . . . . . . . . . . . 0.0V to 0.8V Input High Voltage (VIH) . . . . . . . . . . . . . . . . . . . . . . .VCC/2 to VCC
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUPS 1 2, 3 Output Current (Sink) IOL VCC = 4.5V, VIH = 4.5V, VOUT = 0.4V, VIL = 0V 1 2, 3 Output Current (Source) IOH VCC = 4.5V, VIH = 4.5V, VOUT = VCC - 0.4V, VIL = 0V VCC = 4.5V, VIH = 2.25V, IOL = 50A, VIL = 0.8V VCC = 5.5V, VIH = 2.75V, IOL = 50A, VIL = 0.8V Output Voltage High VOH VCC = 4.5V, VIH = 2.25V, IOH = -50A, VIL = 0.8V VCC = 5.5V, VIH = 2.75V, IOH = -50A, VIL = 0.8V Input Leakage Current IIN VCC = 5.5V, VIN = VCC or GND 1 2, 3 1, 2, 3 LIMITS TEMPERATURE +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC, +125oC, -55oC MIN 7.2 6.0 -7.2 -6.0 MAX 40 750 0.1 UNITS A A mA mA mA mA V
PARAMETER Quiescent Current
SYMBOL ICC
(NOTE 1) CONDITIONS VCC = 5.5V, VIN = VCC or GND
Output Voltage Low
VOL
1, 2, 3
+25oC, +125oC, -55oC
-
0.1
V
1, 2, 3
+25oC, +125oC, -55oC
VCC -0.1 VCC -0.1 -
-
V
1, 2, 3
+25oC, +125oC, -55oC
-
V
1 2, 3
+25oC +125oC, -55oC +25oC +125oC, -55oC +25oC, +125oC, -55oC
0.5 5.0 1 50 -
A A A A -
Three-State Output Leakage Current
IOZ
Applied Voltage = 0V or VCC, VCC = 5.5V
1 2, 3
Noise Immunity Functional Test NOTES:
FN
VCC = 4.5V, VIH = 2.25V, VIL = 0.8V (Note 2)
7, 8A, 8B
1. All voltages referenced to device GND. 2. For functional tests, VO 4.0V is recognized as a logic "1", and VO 0.5V is recognized as a logic "0".
Spec Number 627
518640
Specifications HCTS299MS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUPS 9 10, 11 CLK to Q0, Q7 TPHL, TPLH VCC = 4.5V 9 10, 11 MR to Output TPHL VCC = 4.5V 9 10, 11 OEn to Output TPZH VCC = 4.5V 9 10, 11 TPHZ 9 10, 11 TPZL 9 10, 11 TPLZ 9 10, 11 NOTES: 1. All voltages referenced to device GND. 2. AC measurements assume RL = 500, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = 3V. LIMITS TEMPERATURE +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC MIN 2 2 2 2 2 2 2 2 2 2 2 2 2 2 MAX 28 32 30 34 32 36 23 25 25 27 30 34 30 34 UNITS ns ns ns ns ns ns ns ns ns ns ns ns ns ns
PARAMETER CLK to I/On
SYMBOL TPHL, TPLH
(NOTES 1, 2) CONDITIONS VCC = 4.5V
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Capacitance Power Dissipation SYMBOL CPD CONDITIONS VCC = 5.0V, f = 1MHz NOTES 1 1 Input Capacitance CIN VCC = 5.0V, f = 1MHz 1 1 Output Transition Time TTHL, TTLH VCC = 4.5V 1 1 Max Operating Frequency FMAX VCC = 4.5V 1 1 Setup Time DS0, DS7, I/On to CLK TSU VCC = 4.5V 1 1 TEMPERATURE +25oC +125oC, -55oC +25oC +125oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC MIN 20 30 MAX 147 171 10 10 15 22 25 16 UNITS pF pF pF pF ns ns MHz MHz ns ns
Spec Number 628
518640
Specifications HCTS299MS
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) LIMITS PARAMETER Setup Time S1, S0 to CLK SYMBOL TSU CONDITIONS VCC = 4.5V NOTES 1 1 Hold Time DS0, DS7, I/On, S0, S1 to CLK Recovery Time MR to CLK TH VCC = 4.5V 1 1 TREC VCC = 4.5V 1 1 Pulse Width MR TW (MR) VCC = 4.5V 1 1 Pulse Width CLK TW (CLK) VCC = 4.5V 1 1 NOTE: 1. The parameters listed in Table 3 are controlled via design or process parameters. Min and Max Limits are guaranteed but not directly tested. These parameters are characterized upon initial design release and upon design changes which affect these characteristics. TEMPERATURE +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC MIN 27 41 0 0 5 5 15 22 20 30 MAX UNITS ns ns ns ns ns ns ns ns ns ns
TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS 200K RAD LIMITS PARAMETER Quiescent Current Output Current (Sink) SYMBOL ICC IOL (NOTES 1, 2) CONDITIONS VCC = 5.5V, VIN = VCC or GND VCC = 4.5V, VIN = VCC or GND, VOUT = 0.4V VCC = 4.5V, VIN = VCC or GND, VOUT = VCC -0.4V VCC = 4.5V or 5.5V, VIH = VCC/2, VIL = 0.8V, IOL = 50A VCC = 4.5V or 5.5V, VIH =VCC/2, VIL = 0.8V, IOH = -50A VCC = 5.5V, VIN = VCC or GND Applied Voltage = 0V or VCC, VCC = 5.5V TEMPERATURE +25oC +25oC MIN 6.0 MAX 0.75 UNITS mA mA
Output Current (Source) Output Voltage Low
IOH
+25oC
-6.0
-
mA
VOL
+25oC
-
0.1
V
Output Voltage High
VOH
+25oC
VCC -0.1 -
-
V
Input Leakage Current Three-State Output Leakage Current Noise Immunity Functional Test CLK to I/On
IIN IOZ
+25oC +25oC
5 50
A A
FN
VCC = 4.5V, VIH = 2.25V, VIL = 0.8V, (Note 3) VCC = 4.5V
+25oC
-
-
-
TPHL, TPLH TPHL, TPLH
+25oC
2
32
ns
CLK to Q0, Q7
VCC = 4.5V
+25oC
2
34
ns
Spec Number 629
518640
Specifications HCTS299MS
TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS 200K RAD LIMITS PARAMETER MR to Output OEn to Output SYMBOL TPHL TPZH TPHZ TPZL TPLZ NOTES: 1. All voltages referenced to device GND. 2. AC measurements assume RL = 500, CL = 50pF, Input TR =TF = 3ns, VIL = GND, VIH = 3V. 3. For functional tests VO 4.0V is recognized as a logic "1", and VO 0.5V is recognized as a logic "0". VCC = 4.5V +25oC VCC = 4.5V VCC = 4.5V (NOTES 1, 2) CONDITIONS TEMPERATURE +25oC +25oC MIN 2 2 2 2 2 MAX 36 25 27 34 34 UNITS ns ns ns ns ns
TABLE 5. BURN-IN AND OPERATING LIFE TEST, DELTA PARAMETERS (+25oC) GROUP B SUBGROUP 5 5 5
PARAMETER ICC IOL/IOH IOZL/IOZH
DELTA LIMIT 12A -15% of 0 Hour 200nA
TABLE 6. APPLICABLE SUBGROUPS CONFORMANCE GROUPS Initial Test (Preburn-In) Interim Test I (Postburn-In) Interim Test II (Postburn-In) PDA Interim Test III (Postburn-In) PDA Final Test Group A (Note 1) Group B Subgroup B-5 Subgroup B-6 Group D METHOD 100%/5004 100%/5004 100%/5004 100%/5004 100%/5004 100%/5004 100%/5004 Sample/5005 Sample/5005 Sample/5005 Sample/5005 GROUP A SUBGROUPS 1, 7, 9 1, 7, 9 1, 7, 9 1, 7, 9, Deltas 1, 7, 9 1, 7, 9, Deltas 2, 3, 8A, 8B, 10, 11 1, 2, 3, 7, 8A, 8B, 9, 10, 11 1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas 1, 7, 9 1, 7, 9 Subgroups 1, 2, 3, 9, 10, 11 READ AND RECORD ICC, IOL/H, IOZL/H ICC, IOL/H, IOZL/H ICC, IOL/H, IOZL/H
NOTE: 1. Alternate Group A Inspection in accordance with Method 5005 of MIL-STD-883 may be exercised.
Spec Number 630
518640
HCTS299MS
TABLE 7. TOTAL DOSE IRRADIATION TEST CONFORMANCE GROUPS Group E Subgroup 2 METHOD 5005 PRE RAD 1, 7, 9 POST RAD Table 4 READ AND RECORD PRE RAD 1, 9 POST RAD Table 4 (Note 1)
NOTE: 1. Except FN test which will be performed 100% Go/No-Go.
TABLE 8. STATIC BURN-IN AND DYNAMIC OSCILLATOR OPEN GROUND 1/2 VCC = 3V 0.5V VCC = 6V 0.5V 50kHz 25kHz
STATIC BURN-IN I TEST CONNECTIONS (Note 1) 8, 17 1 - 7, 9 - 16, 18, 19 20 -
STATIC BURN-IN II TEST CONNECTIONS (Note 1) 8, 17 10 1 - 7, 9, 11 - 16, 18 - 20 -
DYNAMIC BURN-IN TEST CONNECTIONS (Note 2) NOTES: 1. Each pin except VCC and GND will have a resistor of 10k 5% for static burn-in 2. Each pin except VCC and GND will have a resistor of 680 5% for dynamic burn-in 2, 3, 10, 18, 19 4 - 8, 13 - 17 1, 9, 20 12 11
TABLE 9. IRRADIATION TEST CONNECTIONS OPEN 8, 17 GROUND 10 VCC = 5V 0.5V 1 - 7, 9, 11 - 16, 18 - 20
NOTE: Each pin except VCC and GND will have a resistor of 47K 5% for irradiation testing. Group E, Subgroup 2, sample size is 4 dice/wafer 0 failures.
Spec Number 631
518640
HCTS299MS Intersil Space Level Product Flow - `MS'
Wafer Lot Acceptance (All Lots) Method 5007 (Includes SEM) GAMMA Radiation Verification (Each Wafer) Method 1019, 4 Samples/Wafer, 0 Rejects 100% Nondestructive Bond Pull, Method 2023 Sample - Wire Bond Pull Monitor, Method 2011 Sample - Die Shear Monitor, Method 2019 or 2027 100% Internal Visual Inspection, Method 2010, Condition A 100% Temperature Cycle, Method 1010, Condition C, 10 Cycles 100% Constant Acceleration, Method 2001, Condition per Method 5004 100% PIND, Method 2020, Condition A 100% External Visual 100% Serialization 100% Initial Electrical Test (T0) 100% Static Burn-In 1, Condition A or B, 24 hrs. min., +125oC min., Method 1015
NOTES: 1. Failures from Interim electrical test 1 and 2 are combined for determining PDA 1. 2. Failures from subgroup 1, 7, 9 and deltas are used for calculating PDA. The maximum allowable PDA = 5% with no more than 3% of the failures from subgroup 7. 3. Radiographic (X-Ray) inspection may be performed at any point after serialization as allowed by Method 5004. 4. Alternate Group A testing may be performed as allowed by MIL-STD-883, Method 5005. 5. Data Package Contents: * Cover Sheet (Intersil Name and/or Logo, P.O. Number, Customer Part Number, Lot Date Code, Intersil Part Number, Lot Number, Quantity). * Wafer Lot Acceptance Report (Method 5007). Includes reproductions of SEM photos with percent of step coverage. * GAMMA Radiation Report. Contains Cover page, disposition, Rad Dose, Lot Number, Test Package used, Specification Numbers, Test equipment, etc. Radiation Read and Record data on file at Intersil. * X-Ray report and film. Includes penetrometer measurements. * Screening, Electrical, and Group A attributes (Screening attributes begin after package seal). * Lot Serial Number Sheet (Good units serial number and lot number). * Variables Data (All Delta operations). Data is identified by serial number. Data header includes lot number and date of test. * The Certificate of Conformance is a part of the shipping invoice and is not part of the Data Book. The Certificate of Conformance is signed by an authorized Quality Representative.
100% Interim Electrical Test 1 (T1) 100% Delta Calculation (T0-T1) 100% Static Burn-In 2, Condition A or B, 24 hrs. min., +125oC min., Method 1015 100% Interim Electrical Test 2 (T2) 100% Delta Calculation (T0-T2) 100% PDA 1, Method 5004 (Notes 1and 2) 100% Dynamic Burn-In, Condition D, 240 hrs., +125oC or Equivalent, Method 1015 100% Interim Electrical Test 3 (T3) 100% Delta Calculation (T0-T3) 100% PDA 2, Method 5004 (Note 2) 100% Final Electrical Test 100% Fine/Gross Leak, Method 1014 100% Radiographic, Method 2012 (Note 3) 100% External Visual, Method 2009 Sample - Group A, Method 5005 (Note 4) 100% Data Package Generation (Note 5)
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
Sales Office Headquarters
NORTH AMERICA Intersil Corporation 7585 Irvine Center Drive Suite 100 Irvine, CA 92618 TEL: (949) 341-7000 FAX: (949) 341-7123 Intersil Corporation 2401 Palm Bay Rd. Palm Bay, FL 32905 TEL: (321) 724-7000 FAX: (321) 724-7946 EUROPE Intersil Europe Sarl Ave. William Graisse, 3 1006 Lausanne Switzerland TEL: +41 21 6140560 FAX: +41 21 6140579 ASIA Intersil Corporation Unit 1804 18/F Guangdong Water Building 83 Austin Road TST, Kowloon Hong Kong TEL: +852 2723 6339 FAX: +852 2730 1433
Spec Number 632
518640
Specifications HCTS299MS AC Timing Diagrams and Load Circuit
INPUT LEVEL MR INPUT LEVEL CP VS TW TPHL I/On, Q0 OR Q7 VS VS Q0 TO Q7 VS VS CP TPLH t PHL VS VS VS VS TREC TW
FIGURE 1. CLOCK PRE-REQUISITE AND PROPAGATION DELAYS
FIGURE 2. MASTER RESET PRE-REQUISITE AND PROPAGATION DELAYS
INPUT LEVEL DS0, DS7 OR I/On VS VS TH(L) TSU(L) CP VS TSU(L) VS VS VS TH(H) VOH TTLH 80% VOL 20% 80% 20% TTHL
OUTPUT
FIGURE 3. DATA PRE-REQUISITE TIMES
FIGURE 4. OUTPUT TRANSITION TIME
AC VOLTAGE LEVELS PARAMETER VCC VIH VS VIL GND HCTS 4.50 3.00 1.30 0 0 UNITS V
CL RL DUT TEST POINT
V V
CL = 50pF
V V
RL = 500
FIGURE 5. AC LOAD CIRCUIT
Spec Number 633
518640
HCTS299MS Three-State Low Timing Diagrams
VIH VS VIL TPZL TPLZ VOZ VT VOL CL CL = 50pF RL = 500 OUTPUT VW DUT TEST POINT RL INPUT
Three-State Low Load Circuit
VCC
Three-State LOW VOLTAGE LEVELS PARAMETER VCC VIH VS VT VW VIL GND HCTS 4.50 3.00 1.30 1.30 0.90 0 0 UNITS V V V V V V V
Three-State High Timing Diagrams
VIH VS VIL TPZH TPHZ VOH VT VOZ OUTPUT VW INPUT
Three-State High Load Circuit
DUT TEST POINT
RL
CL = 50pF RL = 500
Three-State HIGH VOLTAGE LEVELS PARAMETER VCC VIH VS VT VW VIL GND HCTS 4.50 3.00 1.30 1.30 3.60 0 0 UNITS V V V V V V V
Spec Number 634
518640
HCTS299MS Die Characteristics
DIE DIMENSIONS: 123 x 94 mils METALLIZATION: Type: SiAl Metal Thickness: 11kA 1kA GLASSIVATION: Type: SiO2 Thickness: 13kA 2.6kA WORST CASE CURRENT DENSITY: <2.0 x 105A/cm2 BOND PAD SIZE: 100m x 100m 4 mils x 4 mils
Metallization Mask Layout
HCTS299MS
(20) VCC (2) OE1 (19) S1 (1) S0
(18) DS7 OE2 (3)
I/O6 (4)
(17) Q7
I/O4 (5)
(16) I/O7
(15) I/O5 I/O2 (6)
(14) I/O3
I/O0 (7)
(13) I/O1 Q0 (8)
MR (9)
GND (10)
NOTE: The die diagram is a generic plot from a similar HCS device. It is intended to indicate approximate die size and bond pad location. The mask series for the HCTS299 is TA14480A.
DS0 (11)
CP (12)
Spec Number 635
518640

▲Up To Search▲

Price & Availability of HCTS299MS02

	To Download HCTS299MS02 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .